Acoe201_lab1 (4).doc Apr 2026

The primary objective of this lab is to familiarize students with the hardware and software environment used throughout the semester to design and verify a simple CPU.

: Assigning package pins to connect design inputs/outputs to the physical switches and LEDs on the Spartan-3E board to verify the circuit works in real-time. ACOE201_Lab1 (4).doc

While the specific version " (4).doc" might have slight variations, introductory labs for this course usually include: The primary objective of this lab is to

: Designing a simple circuit (e.g., an AND gate or a Half-Adder) using schematic entry or a Hardware Description Language (HDL). : Configuring the Xilinx ISE environment and creating

: Configuring the Xilinx ISE environment and creating a new project.

Based on academic course materials, this lab serves as an introduction to and the design tools required for CPU implementation. Lab 1: Introduction to FPGAs and Design Tools